Systems Architecture
7th Edition
ISBN: 9781305080195
Author: Stephen D. Burd
Publisher: Cengage Learning
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Expert Solution & Answer
Chapter 2, Problem 5VE
Program Description Answer
A command given to the processer to perform specific task or functions is called an “instruction”.
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In the __________ part of the fetch-decode-execute cycle, the CPU determines which operation it should perform. a. fetch b. decode c. execute d. immediately after the instruction is executed
To reduce the memory access time we generally make use of ______ .
The _______________ is a register that holds the address of the next instruction to be executed.
Chapter 2 Solutions
Systems Architecture
Ch. 2 - Prob. 1VECh. 2 - A(n) __________ is a storage location implemented...Ch. 2 - Prob. 3VECh. 2 - A problem-solving procedure that requires...Ch. 2 - Prob. 5VECh. 2 - Prob. 6VECh. 2 - Prob. 7VECh. 2 - Prob. 8VECh. 2 - The major components of a CPU are the __________,...Ch. 2 - A set of instructions thats executed to solve a...
Ch. 2 - Prob. 11VECh. 2 - Prob. 12VECh. 2 - Prob. 13VECh. 2 - A CPU is a(n) __________ processor capable of...Ch. 2 - Prob. 15VECh. 2 - The CPU __________ program instructions one at a...Ch. 2 - Most programs are written in a(n) __________, such...Ch. 2 - Prob. 18VECh. 2 - Prob. 19VECh. 2 - Prob. 20VECh. 2 - Prob. 21VECh. 2 - Prob. 22VECh. 2 - Prob. 23VECh. 2 - Prob. 1RQCh. 2 - What shortcomings of mechanical computation did...Ch. 2 - Prob. 3RQCh. 2 - What is a CPU? What are its primary components?
Ch. 2 - What are registers? What are their functions?
Ch. 2 - Prob. 6RQCh. 2 - Prob. 7RQCh. 2 - Prob. 8RQCh. 2 - How does a supercomputer differ from a mainframe...Ch. 2 - Prob. 10RQCh. 2 - Prob. 11RQCh. 2 - Prob. 12RQCh. 2 - How can a computer system be tuned to a particular...Ch. 2 - What characteristics differentiate application...Ch. 2 - In what ways do system software make developing...Ch. 2 - Why has the development of system software...Ch. 2 - Prob. 17RQCh. 2 - Tables 2.2 and 2.3 will probably be out of date by...
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- Que. The DMA transfer is initiated by _____ i) Processor ii) The process being executed iii) I/O devices iv) OSarrow_forwardThe time delay between two successive initiation of memory operation _______ .arrow_forward27. To get the physical address from the logical address generated by CPU we use ____ . a. MAR b. MMU c. Overlays d. TLBarrow_forward
- :02 72%* © Passing data by reference from program to a subroutine and back to the program is done using: اختر احدى الإجابات Control hardwar. Pointer to memory locations Registers Control instructionsarrow_forward1) During compilation the slot name is translated into the __________ of the memory location where the data is stored. a) Actual address b) Virtual address c) Logical address d) Simulated addressarrow_forwardThe bottom of memory is reserved for the interrupt ___________ table.arrow_forward
- Every address generated by the CPU is divided into two parts. They are ____________ a) frame bit & page number b) page number & page offset c) page offset & frame bit d) frame offset & page offsetarrow_forwardIn ____________, the address of the operand is specified in the instruction. a. Stack Addressing b. Register Addressing c. Immediate Addressing d. Direct Addressingarrow_forwardA stall in the pipeline is indicated by the compiler using a(n) __________ instruction. branch exception nop delayarrow_forward
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