Determine i(t) and i2(t)! E(t) = 60 V, L = 1 H, R = 50 2, C = 104 F. And i and i2 are initially zero. E 00000 L 12 13 R C
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- Describe each of the following expressions as SOP/POS. Discuss the no. of variables and identify min term (standard product term) or max term (standard sum term) F = A BC'D + AB + B`CD + D` * SOP POS min term = A`BC`D max term %3D max term = A`BC`D Number of variables Number of variables = 411. Convert the following decimal numbers to 8421 BCD and Excess-3. Decimal 8421-BCD Excess-3 7910 3110 = %3D %3D FontI. Complete each expression. 1. A +1 = 6. D*1= 2. A * A = 7. D+0 = 3. B* B = 8. C+C= 4. C+C = 9. G+ GF = 5. X*0 = 10. Y + WY
- What will be the final value of DI after executing the following piece of code? Execute the instructions dependently one after another. CLD MOU CX,OFOH MOU AX,05678H MOU DI,01000H MOU ES, DI SUB DI, DI REPNZ SCASB -R AX-0000 DS-073F 073F:0100 0000 D 1000:0 F 1000:0000 92 00 14 12 54 56 44 78-AD 56 78 FO 00 00 00 00 BX-0000 CX-0000 DX-0000 SP-00FD ES-1000 SS%3073F CS=073F BP-0000 SI=0000 DI=0000 IP-0100 NU UP EI PL NZ NA PO NC ADD IBX SI1,AL DS:0000 CD TUDX.Ux..... .... Notes: 1- Use the DEBUG window to answer this question (values shown are prior to execution and in hexadecimal 2- Write down the final value of DI as four hexadecimal digits without any additional characters.The number of possible minterms and Maxterms with a function defined on 7 variables is: 32 minterms & 64 Maxterms 128 minterms & 128 Maxterms 128 minterms & 0 Maxterms O minterms & 128 MaxtermsDesign a code converter that converts a decimal digit from BCD to excess-3 code, the input variables are organized as (A B C D) respectively with A is the MSB, the output variables are organized as (W XY Z) respectively with W is the MSB, put the invalid decimal numbers as don't care. W=A+BD+BC' W=A+BD+BC, W=A'+BD+BC W= BC'D'+B'D+B'C
- Q 1. (a) The adder-subtractor circuit given below has the following values for mode input M and data inputs A and B: determine the Output, Overflow and C for each case. MAB 0 001 100 M a b0 000 000 c1 110| 100 FA FA FA FA d1 010 100 1 000 000 e (b) What is race around condition in sequential circuits? How can we avoid it?The Following is a state diagram for a self correcting 4 bit ring counter, what is the illigal states for the diagram 0001 А 0010 1000 0100 В G A=0000,B=1100,C%30110,D31110,E=1111,F=0 O 111,G=1011,H=0011,i=1010,J31101,K=0101, L=1001 A=0000,B=1100,C=0110,D=1110,E=1111,F=0 O 111,G=1011,H=0011,i=1110,J=1101,K=0101, L=1101 A=0000,B=1101,C=0110,D=1110,E=1111,F=0 O 111,G=1011,H=0011,i=1010,J=1101,K=0101, L=1001 A=0000,B=1100,C30110,D=1110,E=1111,F=0 101,G=1011,H=0011,i=1010,J=1101,K=0111, L=1001Q11/Chose the correct answer for the output Q3 of the following circuit (Assume that A= 1010101010, and B =1110111011 and the first bit out from the circuit is bit 0) * T. Q1 Q3 CLK CLK QI' Q3' K B Q2 CLK Q2' CLK CLK Q3=1000100010 Q3=1001100110 Q3=0010110011 Q3=1001000100 None of them
- Finding Standard SOP and K-Maps (see next page!) Convert each expression to standard SOP form: ( A + B)(C+B') ABD (4-term expression with A, B, C, D) A + BD (4-term expression with A, B, C, D)Decimal Ex Binary Addition Addition (C 3+5 0011 + 0101 4 + 1 8 + 3 2+4 0010 + 0100 0 +7 0000 + 0111 8 +7 9 +9 **When a K-map implicant is called prime, it means that it cannot be removed without changing the functional description. O True O False