(a) Use the characteristic equation for the gated D latch to implement a two-level, NAND-gate circuit for the gated D latch. (b) What hazards exist in the part (a) circuit for Q+? (c) Modify the circuit of part (a) to obtain a two-level, NAND gate circuit for Q+ that is free of hazards. (d) Add another output, P, to the circuit of part (a) so that P = Q' whenever the circuit is in a stable state. When the circuit is in an unstable state, the value of P is a don't care. Use the simplest circuit to obtain P. (Note: The circuit for P need not be two level.)

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11.29 (a) Use the characteristic equation for the gated D latch to implement a two-level,
NAND-gate circuit for the gated D latch.
(b) What hazards exist in the part (a) circuit for Q+?
(c) Modify the circuit of part (a) to obtain a two-level, NAND gate circuit for Q+
that is free of hazards.
(d) Add another output, P, to the circuit of part (a) so that P = Q' whenever the
circuit is in a stable state. When the circuit is in an unstable state, the value of P
is a don't care. Use the simplest circuit to obtain P. (Note: The circuit for P need
not be two level.)
Transcribed Image Text:11.29 (a) Use the characteristic equation for the gated D latch to implement a two-level, NAND-gate circuit for the gated D latch. (b) What hazards exist in the part (a) circuit for Q+? (c) Modify the circuit of part (a) to obtain a two-level, NAND gate circuit for Q+ that is free of hazards. (d) Add another output, P, to the circuit of part (a) so that P = Q' whenever the circuit is in a stable state. When the circuit is in an unstable state, the value of P is a don't care. Use the simplest circuit to obtain P. (Note: The circuit for P need not be two level.)
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