Discuss in detail about RAM allocation in 8051 and Analyse, and explain the objective of the following 8051 assembly language program. Specify the content of the Program Status Word (PSW) register after the execution of each instruction. ORG 00H MOV A#00H MOV R5,A MOV R0,#0FBH ADD A#0FEH JNC NI INC R5 NI: ADD A, #0F5H JNC N2 INC R5 N2: ADD A,#0F2H JNC OVER INC R5 OVER: MOV @RO, A END Comment every line of the program and specify the register contents on single-step execution.
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- An 8051 subroutine is shown below: SUB: RO, #20H @RO , #0 MOV LOOP: MOV INC RO CJNE RO, #80H, LOOP RET a. What does this subroutine do? b. In how many machine cycles does each instruction execute? How many bytes long is each instruction? C. d. Convert the subroutine to machine language. e. How long does this' subroutine take to execute? (Assume 12 MP. 2. Consider a proposed new instruction named rpt. This instruction combines a loop's condition check and counter decrement into a single instruction. For example rpt x29, loop would do the following: if (x29 >0) { x29 = x29 -1: goto loop a) If this instruction were to be added to the RISC-V instruction set. what is the most appropriate instruction format? b) What is the shortest sequence of RISC-V instructions that performs the same operation?1. Write the contents of all registers and the conditions codes registers after each execution instructions in Table Q1(a). Instructions SUBS r0, rl, 12 MOV 12,13, ASR #3 ro 11223344 Table Q1 (a) rl F7770025 12 r3 CF119856 CF119856 NZ V C 010 1
- Explain the SUB instruction of 8086. Compare it with SBB instruction. Write a Assembly language program for 8086 to find the square root of a number using SUB instruction. (Note : Solve the question in paper, scan and upload along with the other Part B and C answers) A BIE3. Suppose r0=0x20000000 and r1=0x12345678. All bytes in memory are initialized to 0x00. Suppose the following assembly program has run successfully (the three instructions will be executed in the given order). Draw a table to show the memory value if the processor uses little endian. STR r1, [r0], #4 STR r1, [r0,#4]! STR r1, [r0, # 4] Address 0x20000010 0x2000000f 0x2000000e 0x2000000d 0x2000000c 0x2000000b 0x2000000a 0x20000009 0x20000008 0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000 Datad) This addressing mode is always used to access memory, shown here as the source operand of this instruction: LDR R1,[R0]?
- 1)Write a program in 8051 to copy the contents of registers R0 to R7 into internal RAM addresses 40H to 47H respectively using PUSH instructions. Assume Register Bank 0 is selected. 2 )Designa Programmable timer using 8254 and 8086 to generate a square wave of period 5 millisecond. Interface 8254 at the address 0040H for Counter 0 and write the assembly language program. The 8086 and 8254 runs at 6 megahertz and 3 megahertz respectively.If R0 = 0x20008000, after run STMDB r0!, {r3, r9, r7, r1, r2} command what is the r7 register memory start address?A. R0= 0x20007ff4B. R0 = 0x20007ffefC. R0 = 0x20007fffD. R0=0x20007fecE. R0 = 0x20007ff0DIsassemble the following MIPS 32-bit hexadecimal instruction written as addr:instr 60005000 : 0c000020
- - The stack memory is addressed by a combination of the plus offset. The PUSH and POP instructions always transfer between segment -bit number the stack and a register or memory location in the 8086 microprocessors. For string instructions, DI always addresses data in the segment. The 8086 LOOP instruction decrements register for a 0 to decide if a jump occurs and tests itConsider the following assembly program MOV CX, 1100H DLY: SUBS CX, CX, #1 NOP BNE DLY NXT: --- (a) How many times does the BNE DLY instruction get executed? (b) Change the first line of the program so that BNE DLY is executed 34 times (c) Change the second line of the program so that BNE DLY is executed 34 times, while the fist line stays unchanged (MOV CX, 1100H)1- Explain the meaning and operation of CMC instruction ? 2. The Instruction Pointer is bits in length. a) 8 bits b) 4 bits c) 16 bits d) 32 bits